Recently, to realize the low resistivity of conductor plugs and interconnections, the use of Cu as a material of the conductor plugs and interconnections is noted.
Cu film is a material which is difficult to dry etching. Thus, Cu film is buried in contact holes or trenches by forming the contact holes or the trenches in an inter-layer insulation film, forming a Cu film on the inter-layer insulation film with the contact holes or trenches formed in and then polishing the Cu film until the surface of the inter-layer insulation film is exposed. Such process of burying Cu film in contact holes or trenches is called damascene process.
When the conductor plugs or the interconnections of Cu film directly contact the inter-layer insulation film, Cu atoms in the conductor plugs or the interconnections diffuse into the inter-layer insulation film, resultantly causing problems of short-circuits, etc. To prevent the problems, a barrier film for preventing the diffusion of the Cu atoms is formed in the contact holes or the trenches. As a material of such barrier film, Ta film or others, for example, is used.
Recently, to realize further scaling down semiconductor devices, the diameter of the contact holes for the conductor plugs to be buried in, and the width of the trenches for the interconnections to be buried in are required to be much reduced. To much reduce the diameter of the contact holes, it is necessary to extremely thin the barrier film.
Related references are as follows:                Japanese Laid-open Patent Publication No. 02-62035;        Japanese Laid-open Patent Publication No. 2003-218198;        Japanese Laid-open Patent Publication No. 2005-277390;        Japanese Laid-open Patent Publication No. 2007-59660;        Japanese Laid-open Patent Publication No. 2006-57162;        Japanese Laid-open Patent Publication No. 2002-146535;        Japanese Laid-open Patent Publication No. 2007-27259;        Japanese Laid-open Patent Publication No. 2007-96241;        Japanese Laid-open Patent Publication No. 2001-230219;        Japanese Laid-open Patent Publication No. 2007-141927;        T. Usui et al., “Low Resistive and Highly Reliable Cu Dual-Damascene Interconnect Technology Using Self-Formed MnSixOy Barrier Layer”, International Interconnect Technology Conference, 2005 (IITC 2005), Jun. 6-8, 2005, pp. 188-190; and        Junghwan Sung et al., “Remove-Plasma chemical vapor deposition of conformal ZrB2 films at low temperature; A promising diffusion barrier for ultralarge scale integrated electronics”, Journal of Applied Physics, Volume 91, Number 6, pp. 3904-3911 (2002).        